Центральный процессор MC912DG128ACPV на приборную панель Volvo V70 II Рестайлинг 2004-2007
Характеристики
Параметр | Значение |
---|---|
Артикул | 009487 |
Модель и марка | Volvo V70 II Рестайлинг 2004-2007 |
Количество на складе | уточняйте у менеджера |
Количество просмотров | 289 |
Описание
В нашем интернет магазине Вы можете купить центральный процессор (микроконтроллер) MC912DG128ACPV производства Freescale панели приборов Nissan Navara (Frontier) III (D40) Рестайлинг 2010-2015 по минимальной цене в Москве, а так же воспользоваться услугой по ремонту приборной панели Nissan Navara (Frontier) III (D40) Рестайлинг 2010-2015
1.1 Overview The MC9S12DT128B microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules (MSCAN12), a Byteflight module and an Inter-IC Bus. The MC9S12DT128B has full 16-bit data paths throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. 1.2 Features • HCS12 Core – 16-bit HCS12 CPU i. Upward compatible with M68HC11 instruction set ii. Interrupt stacking and programmer’s model identical to M68HC11 iii.20-bit ALU iv. Instruction queue v. Enhanced indexed addressing – MEBI (Multiplexed External Bus Interface) – MMC (Module Mapping Control) – INT (Interrupt control) – BKP (Breakpoints) – BDM (Background Debug Mode) • CRG (Clock and Reset Generator) – Choice of low current Colpitts oscillator or standard Pierce Oscillator – PLL – COP watchdog – real time interrupt – clock monitor • 8-bit and 4-bit ports with interrupt functionality– Digital filtering – Programmable rising or falling edge trigger • Memory – 128K Flash EEPROM – 2K byte EEPROM – 8K byte RAM • Two 8-channel Analog-to-Digital Converters – 10-bit resolution – External conversion trigger capability • Three 1M bit per second, CAN 2.0 A, B software compatible modules – Five receive and three transmit buffers – Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit – Four separate interrupt channels for Rx, Tx, error and wake-up – Low-pass filter wake-up function – Loop-back for self test operation • Enhanced Capture Timer – 16-bit main counter with 7-bit prescaler – 8 programmable input capture or output compare channels – Two 8-bit or one 16-bit pulse accumulators • 8 PWM channels – Programmable period and duty cycle – 8-bit 8-channel or 16-bit 4-channel – Separate control for each pulse width and duty cycle – Center-aligned or left-aligned outputs – Programmable clock select logic with a wide range of frequencies – Fast emergency shutdown input – Usable as interrupt inputs • Serial interfaces – Two asynchronous Serial Communications Interfaces (SCI) – Two Synchronous Serial Peripheral Interface (SPI) – Byteflight • Byte Data Link Controller (BDLC)• SAE J1850 Class B Data Communications Network Interface – Compatible and ISO Compatible for Low-Speed (
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