Центральный процессор MC912DG128ACPV на приборную панель Volvo XC90 I 2002-2006
Характеристики
Параметр | Значение |
---|---|
Артикул | 009347 |
Модель и марка | Volvo XC90 I 2002-2006 |
Количество на складе | уточняйте у менеджера |
Количество просмотров | 573 |
Описание
В нашем интернет магазине Вы можете купить центральный процессор (микроконтроллер) MC912DG128ACPV производства Freescale панели приборов Volvo XC90 I 2002-2006 по минимальной цене в Москве, а так же воспользоваться услугой по ремонту приборной панели Volvo XC90 I 2002-2006
Особенности • HCS12X Core — 16-bit HCS12X CPU – Upward compatible with MC9S12 instruction set – Interrupt stacking and programmer’s model identical to MC9S12 – Instruction queue – Enhanced indexed addressing – Enhanced instruction set — EBI (external bus interface) — MMC (module mapping control) — INT (interrupt controller) — DBG (debug module to monitor HCS12X CPU and XGATE bus activity) — BDM (background debug mode) • XGATE (peripheral coprocessor) — Parallel processing module off loads the CPU by providing high-speed data processing and transfer — Data transfer between Flash EEPROM, RAM, peripheral modules, and I/O ports • Memory – 512K, 384K, 256K byte Flash EEPROM – 4K byte EEPROM – 32K, 28K, 16K byte RAM • CRG (clock and reset generator) — Low noise/low power Pierce oscillator — PLL — COP watchdog — Real time interrupt — Clock monitor — Fast wake-up from stop mode • Analog-to-digital converter — 16 channels, 10-bit resolution — External conversion trigger capability • ECT (enhanced capture timer) — 16-bit main counter with 8-bit prescaler — 8 programmable input capture or output compare channels — Four 8-bit or two 16-bit pulse accumulators • PIT (periodic interrupt timer) — Four timers with independent time-out periods — Time-out periods selectable between 1 and 224 bus clock cycles 8 PWM (pulse-width modulator) channels — Programmable period and duty cycle — 8-bit 8-channel or 16-bit 4-channel — Separate control for each pulse width and duty cycle — Center-aligned or left-aligned outputs — Programmable clock select logic with a wide range of frequencies — Fast emergency shutdown input • Two 1-Mbps, CAN 2.0 A, B software compatible modules — Five receive and three transmit buffers — Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit, or 8 x 8 bit — Four separate interrupt channels for Rx, Tx, error, and wake-up — Low-pass filter wake-up function — Loop-back for self-test operation • Two IIC (Inter-IC bus) Modules — Compatible with IIC bus standard — Multi-master operation — Broadcast mode • Serial interfaces — Two asynchronous serial communication interfaces (SCI) with additional LIN support and selectable IrDA 1.4 return-to-zero-inverted (RZI) format with programmable pulse width — Synchronous Serial Peripheral Interface (SPI) • Liquid crystal display (LCD) driver with variable input voltage — Configurable for up to 32 frontplanes and 4 backplanes or general-purpose input or output — 5 modes of operation allow for different display sizes to meet application requirements — Unused frontplane and backplane pins can be used as general-purpose I/O • PWM motor controller (MC) with 24 high current drivers — Each PWM channel switchable between two drivers in an H-bridge configuration — Left, right and center aligned outputs — Support for sine and cosine drive — Dithering — Output slew rate control • Six stepper stall detectors (SSD) — Full step control during return to zero — Voltage detector and integrator / sigma delta converter circuit — 16-bit accumulator register — 16-bit modulus down counterOn-Chip Voltage Regulator — Two parallel, linear voltage regulators with bandgap reference — Low-voltage detect (LVD) with low-voltage interrupt (LVI) — Power-on reset (POR) circuit — 3.3-V–5.5-V operation — Low-voltage reset (LVR) — Ultra low-power wake-up timer • 144-pin LQFP and 112-pin LQFP packages — I/O lines with 5-V input and drive capability — Input threshold on external bus interface inputs switchable for 3.3-V or 5-V operation — 5-V A/D converter inputs — 8 key wake up interrupts with digital filtering and programmable rising/falling edge trigger • Operation at 80 MHz equivalent to 40-MHz bus speed • Development support — Single-wire background debug™ mode (BDM) — Four on-chip hardware breakpoints
Телефон для связи: +7 (966) 099-30-36
Наш адрес: Москва, ул. Алтуфьевское шоссе д. 31 стр. 1 (схема проездасхема проезда)